刘佳欣(电子科技大学,“百人计划”特聘研究员)

  • 工作地址:成都市高新西区西源大道2006号电子科技大学清水河校区
  • 联系方式:liujiaxin@uestc.edu.cn

教育背景

  • 联合培养博士:美国德州大学奥斯汀分校,2015/11 - 2017/11
  • 博士:电子科技大学,2013/09 - 2018/12
  • 硕士:电子科技大学,2010/09 - 2013/06
  • 学士:山东大学,2006/09 - 2010/06

工作经历

  • 特聘研究员:电子科技大学,2021.03 - 至今
  • 博士后:清华大学,2019.03 - 2021.03
  • 研究助理:清华大学,2018/10 - 2019/03

研究方向

  • 模拟与混合信号集成电路设计
  • 高能效模数转换器(ADC)芯片

代表性论文

  1. Jiaxin Liu, Dengquan Li, Yi Zhong, Xiyuan Tang, Nan Sun, “A 250kHz-BW 93dB-SNDR 4th-Order Noise-Shaping SAR Using Capacitor Stacking and Dynamic Buffering,” IEEE International Solid-State Circuits Conference (ISSCC), pp. 369-371, Feb. 2021. [pdf]
  2. Jiaxin Liu, Xiyuan Tang, Wenda Zhao, Linxiao Shen, and Nan Sun, “A 13-bit 0.005mm^2 40-MS/s SAR ADC with kT/C Noise Cancellation”, IEEE Journal of Solid-State Circuits (JSSC), vol. 55, no. 12, pp. 3260-3270, 2020. (ISSCC invited submission) [pdf]
  3. Jiaxin Liu, Xiyuan Tang, Wenda Zhao, Linxiao Shen, and Nan Sun, “A 13b 0.005mm2 40MS/s SAR ADC with kT/C Noise Cancellation”, IEEE International Solid-State Circuits Conference (ISSCC), pp. 258-260, Feb. 2020. [pdf]
  4. Jiaxin Liu, Xing Wang, Zijie Gao, Mingtao Zhan, Xiyuan Tang, and Nan Sun, “A 40kHz-BW 90dB-SNDR Noise-Shaping SAR with 4× Passive Gain and 2nd-order Mismatch Error Shaping,” IEEE International Solid-State Circuits Conference (ISSCC), pp. 158-160, Feb. 2020. [pdf]
  5. Jiaxin Liu, Shaolan Li, Wenjuan Guo, Guangjun Wen, and Nan Sun, “A 0.029-mm^2 17-fJ/Conversion-Step Third-Order CT ΔΣ ADC With a Single OTA and Second-Order Noise-Shaping SAR Quantizer”, IEEE Journal of Solid-State Circuits (JSSC), vol. 54, no. 2, pp. 428-440, 2019. [pdf]

科研项目

  • 国家自然科学基金青年项目,2020.1~2020.12,主持。
  • 国家自然科学基金重点项目,2020.1~2024.12,参与。
  • 国家自然科学基金重大项目子课题,2021.1~2025.12,参与。
  • 国家重点研发计划项目子课题,2020.1~2023.12,参与。
Previous